Design-Reuse2y
High performance dual-issue, out-of-order, 7-stage Vector processor (DSP) IP
World's first audio DSP IP with RISC-V Vector processor architecture RiVAI-V1 is a dual-issue, Out-of-Order execution, 7-stage pipeline, 32-bit RISC-V processor core that supports the RV32IMFAC ...
Design-Reuse2y
64-bit RISC-V Multicore Processor with 1024-bit Vector Extension
AndesCore™ AX45MPV 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeStar™ V5 architecture. It supports RISC-V standard “G (IMA-FD)”, “C” ...
etnow9mon
MSA Moves the Barricades and More for Les Mis Arena Spectacular World Tour
The main automation rig supplied includes 28 x 500kg Apex hoists with v2 drives and a Kinesys Mentor SIL3 compatible safety system. Additionally, two eight-metre runs of Litec DST Tracking truss are ...